Thin film transistor-liquid crystal display (TFT-LCD) panels are widely used flat panel display devices. As the integration density and size of the TFT-LCD panels increase, it may become increasingly important to provide low resistivity gate lines and data lines for the panel. Accordingly, aluminum is being widely investigated for the gate lines and data lines of the TFT-LCD panels.
Currently, 22" diagonal size panels may be obtained from 370.times.470 mm.sup.2 mother glass panels. It has been confirmed that aluminum can be used for these panels without degradation of display quality. See the publication entitled "Limitation and Prospects of a-Si:H TFTs", by W. E. Howard, Journal of the SID, Vol. 3, No. 3, p. 127 (1995). In this publication, it is estimated that pure aluminum can be used for up to 30" diagonal size panels. This suggests that aluminum metalization can be used for even larger size panel fabrication, such as third generation mother glass panels of 550.times.650 mm.sup.2 in size.
Unfortunately, pure aluminum may have problems which may limit its suitability for TFT-LCD panels. For example, as shown in FIG. 1, when a pure aluminum layer 3 is deposited on a substrate 1, for example a transparent substrate for a TFT-LCD, using sputtering, the grains 3a of pure aluminum may grow in a columnar grain structure. During subsequent fabrication steps, subsequent layers or subsequent fabrication conditions may place the aluminum layer 3 under compressive stress, as shown by arrows 4. As a result of the compressive stress, grains 3a may extend from the planar surface of the pure aluminum layer 3 and may thereby form hillocks thereon.
Moreover, in subsequent processing, the pure aluminum layer 3 may be subject to a wet etch of an indium tin oxide (ITO) layer, which is generally used as a transparent conductive layer in a TFT-LCD. This etch may cause a chemical attack on the pure aluminum layer. Moreover, since the pure aluminum layer has a strong affinity for oxygen, electrochemical corrosion may occur between the pure aluminum layer and the ITO layer. Accordingly, the pure aluminum layer should not directly contact the ITO layer. One or more of these shortcomings can therefore degrade the quality and yield of the TFT-LCDs. As such, pure aluminum is often not used, despite the potential advantages thereof.
In order to obviate one or more of the above shortcomings, it is known to carefully select the gate insulator that overlies the aluminum layer. Generally, the gate insulator includes a double insulator structure to protect the surface of the aluminum layer. The double insulator structure is generally formed of a first gate insulator of anodized aluminum and a second insulator of a chemical vapor deposited nitride film.
FIGS. 2A through 2F, illustrate a conventional method for fabricating a TFT-LCD in which an anodization is used. As shown in FIG. 2A, a transparent substrate 1 for a TFT-LCD, such as a glass substrate, is provided. Thereafter, a pure Al layer 3 is deposited on the substrate 1 to a predetermined thickness by sputtering. The deposition of the pure Al is followed by respectively patterning the pure Al layer 3 to form a TFT gate pattern 3b, a gate line pattern and a first contact pattern 3c in a gate pad area. It will be understood that the gate pattern 3b and the first contact pattern 3c are interconnected by the gate line pattern to form a TFT-LCD body.
Thereafter, a photoresist layer 5 that serves as an anodized mask layer is formed only on the first contact pattern 3c of the gate pad area by a conventional photo-imaging process, as shown in FIG. 2b. An anodized layer 7 of Al.sub.2 O.sub.3 is formed to a thickness ranging from 1500.ANG. to 2000.ANG. only on the surface of the gate pattern 3b and on the gate line by anodizing. The anodization layer 7 is used for the first gate insulator.
As shown in FIG. 2C, after removing the photoresist layer 5, amorphous nitride 9 that is used for the second gate insulator, amorphous silicon 11 and n.sup.+ amorphous silicon 13 are successively deposited on the substrate using CVD. Thereafter, photolithography is used to form the active layer only on the gate pattern 3b, which includes an amorphous silicon layer 11 and an n.sup.+ amorphous silicon layer 13. As a result, only the amorphous nitride 9 is left on the contact pattern 3b.
As shown in FIG. 2D, the amorphous nitride 9 on the first contact pattern 3c is then patterned to leave only an inner portion thereof, using a photolithographic process. As a result, the outer portion of the first contact pattern 3c, from which the amorphous nitride is removed, is exposed.
As shown in FIG. 2E, a metal layer 15, such as a chrome layer, is deposited to a predetermined thickness by sputtering. The metal layer 15 is patterned to form a data line pattern 15a and a second contact pattern 15b on the n.sup.+ amorphous silicon layer 13 and on the first contact pattern 3c, respectively, using photolithography. This divides the data line pattern 15a into a source line pattern and a drain line pattern. The surface of the n.sup.+ amorphous silicon layer 13 between the divided patterns of the data line pattern 15a is exposed. The second contact pattern 15b of chrome comes into direct contact with the first contact pattern 3c of Al.
Thereafter, the exposed area of the n.sup.+ amorphous silicon layer 13 is etched. The amorphous silicon 11 may also be etched to a predetermined depth.
As shown in FIG. 2F, a protective layer 17, such as a nitride layer, is deposited on the substrate 1 by CVD. A contact hole 18 is then formed in the protective layer 17 by a photolithographic process. Upon completion of the contact hole 18, an ITO layer 19 or other transparent conductor is deposited on the protective layer 17. Thereafter, the transparent conductor 19 is patterned by photolithography to form a pixel electrode pattern. As a result, the transparent conductor 19 comes into direct contact with the data line pattern 15a through the contact hole 18.
The resultant TFT-LCD has a thick and dense anodized layer 7 such as an Al.sub.2 O.sub.3 ceramic insulator having a thickness ranging from 1500.ANG. to 2000.ANG. on the surface of the gate pattern 3b. This anodized layer can suppress hillock formation.
However, if the Al layer of the contact pattern of the gate pad is anodized during the anodization process, the Al layer may not directly contact the ITO layer in the contact pattern. An additional photolithography process may be required to prevent the Al layer of the contact pattern from anodizing, which can complicate the fabrication process and can result in increased cost. Moreover, the anodized layer may have a relatively high resistance.
Accordingly, to simplify the process of the gate line formation for TFT-LCD, the use of double layered gate metals having an Al-alloy and a refractory metal is being considered. Al-Zr, Al-Ta and/or Al-Ti can be used for the Al-alloy, and Mo, Cr, Ta and other refractory metals can be used. The double layered gate metals are nearly hillock free and can have resistance of approximately 10.mu..OMEGA.Cm after annealing at 400.degree. C.
However, the double layered gate metals may have more than three times the resistivity of pure Al, and are especially chemically vulnerable against photoresist stripper and ITO etchant. Moreover, a so called "splash" problem may produce alloy clusters in the deposited Al-alloy film. Thus, double layered gate metals are capable of suppressing hillock formation in an Al gate line to some extent, but may not be suitable for the next generation TFT-LCD panels.